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US Patent Issued to NVIDIA on Sept. 22 for "Firmware-controlled memory binding and implicit data persistence for hardware accelerators" (American, Indian Inventors)

ALEXANDRIA, Va., Sept. 24 -- United States Patent no. 12,743,372, issued on Sept. 22, was assigned to NVIDIA Corp. (Santa Clara, Calif.). "Firmware-controlled memory binding and implicit data persist... Read More


US Patent Issued to Micron Technology on Sept. 22 for "Garbage collection with reduced buffer usage" (American, Indian Inventors)

ALEXANDRIA, Va., Sept. 24 -- United States Patent no. 12,743,373, issued on Sept. 22, was assigned to Micron Technology Inc. (Boise, Idaho). "Garbage collection with reduced buffer usage" was invente... Read More


US Patent Issued to SAMSUNG ELECTRONICS on Sept. 22 for "Storage device including nonvolatile memory device and operating method of storage device" (South Korean Inventors)

ALEXANDRIA, Va., Sept. 24 -- United States Patent no. 12,743,374, issued on Sept. 22, was assigned to SAMSUNG ELECTRONICS Co. LTD. (Suwon-si, South Korea). "Storage device including nonvolatile memor... Read More


US Patent Issued to NetApp on Sept. 22 for "Projecting allocatable capacity for compute instances using cached data" (Israeli Inventors)

ALEXANDRIA, Va., Sept. 24 -- United States Patent no. 12,743,376, issued on Sept. 22, was assigned to NetApp Inc. (San Jose, Calif.). "Projecting allocatable capacity for compute instances using cach... Read More


US Patent Issued to Ascenium on Sept. 22 for "Parallel processing architecture with block move support" (California Inventor)

ALEXANDRIA, Va., Sept. 24 -- United States Patent no. 12,743,377, issued on Sept. 22, was assigned to Ascenium Inc. (Mountain View, Calif.). "Parallel processing architecture with block move support"... Read More


US Patent Issued to Google on Sept. 22 for "Address range based memory hints for prefetcher, cache and memory controller" (California, New York Inventors)

ALEXANDRIA, Va., Sept. 24 -- United States Patent no. 12,743,378, issued on Sept. 22, was assigned to Google LLC (Mountain View, Calif.). "Address range based memory hints for prefetcher, cache and m... Read More


US Patent Issued to International Business Machines on Sept. 22 for "Interleaving cache line data transfers and handling misses of speculatively fetched data" (Texas, New York Inventors)

ALEXANDRIA, Va., Sept. 24 -- United States Patent no. 12,743,379, issued on Sept. 22, was assigned to International Business Machines Corp. (Armonk, N.Y.). "Interleaving cache line data transfers and... Read More


US Patent Issued to Microsoft Technology Licensing on Sept. 22 for "Caching a memory descriptor for plural input/output requests" (Washington, Hawaii Inventors)

ALEXANDRIA, Va., Sept. 24 -- United States Patent no. 12,743,380, issued on Sept. 22, was assigned to Microsoft Technology Licensing LLC (Redmond, Wash.). "Caching a memory descriptor for plural inpu... Read More


US Patent Issued to Regatta Data on Sept. 22 for "Method and system for managing cache eviction based on recency and frequency" (Israeli, Portuguese Inventors)

ALEXANDRIA, Va., Sept. 24 -- United States Patent no. 12,743,381, issued on Sept. 22, was assigned to Regatta Data Ltd. (Bet Hanania, Israel). "Method and system for managing cache eviction based on ... Read More


US Patent Issued on Sept. 22 for "Key management in computer processors" (Texas Inventor)

ALEXANDRIA, Va., Sept. 24 -- United States Patent no. 12,743,382, issued on Sept. 22. "Key management in computer processors" was invented by Steven Jeffrey Wallach (Dallas). According to the abstra... Read More